Processing wafers to manufacture semiconductor devices includes several steps such as etching and cleaning processes to form features of the semiconductor device on the wafers. The etching processes involve removal of material either directly from the wafers or from layers formed on the wafers. The etching processes leave behind residual material which is removed during the cleaning processes. However, as the geometry of semiconductor devices continues to decrease, trace amounts of contaminants, such as polymer residues remaining behind in high aspect ratio trenches and vias are becoming more and more difficult to remove.
Conventional cleaning methods use wet spray and dispense methods in which the semiconductor substrate is rotated at a relatively high spin speed (e.g., 300-1000 rpm) and high spray force (e.g., pressures up to 30 psi) is used to produce strong shear stress and turbulent flow for cleaning the sidewalls and bottoms of high aspect ratio trenches and vias. These cleaning methods, however come not without their shortcomings. Feature patterns with small pitch (e.g., less than 40 nm) can be easily collapsed by the strong shear force and the high wafer rotation. Further, the efficiency of removing residue at the bottoms and/or on the sidewall of high aspect ratio trenches and vias is very low. Furthermore, these traditional cleaning methods can be expensive in that they use high chemical consumption (e.g., about 0.5-4 L/min.).
Accordingly, a need exists for an improved cleaning method for cleaning small pitch features that do not have the shortcomings of traditional cleaning methods.